SK70704PE  PLCC28 Analog Core Chip (ACC) LEVEL ONE

1168 Kbps HSDL Data Pump Chip Set

The HDSL Data Pump is a chip set consisting of the following two devices: 

■ SK70704 Analog Core Chip (ACC) 

■ SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC) HDSL Digital Transceiver (HDX) 

The HDSL Data Pump is a 2-wire transceiver which provides echo-cancelling and 2B1Q line 

coding. It incorporates transmit pulse shaping, filtering, line drivers, receive equalization, timing 

and data recovery to provide 1168 kbps, clear-channel, “data pipe” transmission. The Data Pump provides Near-End Cross-Talk (NEXT) performance in excess of that required over all ETSI test loops. Typical transmission range on 0.4 mm cable exceeds 3.6 km in a noise-free environment  or 2.8 km with a 0 dB margin over 10 µV/√Hz ETSI noise. 

The Data Pump meets the requirements of ETSI ETR-152. It provides one end of a single-channel HDSL transmission system from the twisted pair interface back to the Data Pump/HDSL data interface. The Data Pump can be used at either the NTU or the LTU end of the interface.